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Improving quality of gate dielectric interface

Kontrox drastically reduces the surface defect state density at the interface between the semiconductor and the gate dielectric.

Semiconductor-dielectric interfaces are the key for many modern semiconductor device operations and the quality of this crucial interface basically determines the device performance in many applications. In transistors using compound semiconductor materials achieving these levels of quality is extremely difficult.

​The issue is due to the very aggressive oxidation of surfaces during device manufacturing and the following high density of interface defects states which diminishes the device performance. Generally, dielectric materials are some kind of oxide, such as  Al2O3, HfO2 grown via i.e Atomic Layer Deposition (ALD). These oxides introduce a pathway for the oxidation of the III-V semiconductor surface. It is well known the  “self-cleaning” effects of ALD processes for III-V surfaces, however, the III-V- ALD Oxide interface has been still characterized by a high density of interface states that are impeding the realization of III-V based CMOS technology or high-quality metal-insulator enhancement-mode high-electron-mobility transistors (MIS-HEMTs) for radio-frequency and power electronic applications.

​Kontrox resolves the issue by forming natural perfect quality crystalline III-V oxide structures that passivate and protect the surfaces against oxidation prior to the deposition of dielectric material, ensuring the highest quality interfaces. Kontrox layers are thermodynamically stable and in addition, to reduce the interface states it also increases the barrier height at the surface behaving as a natural diffusion barrier for further oxidation.

​The passivation effect has been demonstrated by producing III-V MIS capacitors yielding an even 98% reduction of defect state densities at the III-V ALD-grown dielectric interface. The improved interfaces can be verified by dramatic enhancement in the photoluminescence intensity which is an indication of reduced defect-related non-radiative recombination. The applicability of the improved III-V dielectric interfaces is most evident in transistor-based applications where good quality channel modulation and minimized gate leakage are essential.

Key Enabler for III-V CMOS

Silicon-related digital transistor technology has been dominating the IC industry for several decades. However, the geometrical transistor scaling as per Moore’s law is facing its fundamental limits as the smallest dimensions in the chips are soon at the atomic level. It is generally accepted that Moore’s law cannot continue without new solutions and innovations in the front-end-of-line (FEOL) device architectures. This includes introducing new materials of which the III-V compound semiconductors are the main candidates for substituting silicon. The main reason is even an order of magnitude higher carrier mobilities compared to silicon allowing higher operating frequencies at equivalent chip dimensions compared to silicon.

Substrate wafers

Kontrox forms a high-quality homogeneous termination layer to reduce epi-growth defects and improve wafer bonding processes. 

Passivation of sidewalls
for III-V based
MESA structures

In optoelectronic devices, surface recombination and leakage of carriers impose serious limitations on the efficiency of semiconductor devices. Kontrox prevents this from happening.