April 2023 marks the 58th anniversary since Intel co-founder Gordon Moore put forward his iconic proposition that foretold the ever-increasing density of transistors on a microchip in the years to come, famously known as Moore's Law. While Moore’s Law was initially formulated as a megatrend forecast rather than a fixed law of physics, it has visionarily set a paradigm that has turbocharged the semiconductor development for decades.
A self-fulfilling and self-defying prediction
The astounding progress and evermore innovation that has been unfolding in the market, even pushing the limits of technological advancements into the deep nanometer regime, is a testament to how Moore’s Law has been used as an industry benchmark since its inception. Semiconductor companies would develop IC chips with the goal of continually doubling their performance. They would mull this increased computing capacity and determine what technology enabled the new level of performance.
As electronics become increasingly complex assemblies of components, the pressure is on end-device manufacturers to develop and market products smaller yet increase their capabilities and functionalities. The industry's incessant quest for increasing amount of functionality within a chip, along with decreasing switching times, higher clock frequencies and lower power dissipation, is a case in point, which has been the main driver for the aggressive CMOS (Complementary metal-oxide-semiconductor) transistor scaling in digital electronics.
The combined vectors of rising product complexity and component miniaturization have, paradoxically, ushered in a new era for the semiconductor industry in which device scaling and cost reduction will no longer tread the same path followed in the past few decades.
In effect, the slowdown of the Moore’s Law is inevitable. For instance, the technology of logic CMOS transistors is coming to a major turning point in the next few years as device scaling will face its fundamental limits when the sizes of the smallest structures, namely the thickness of the gate dielectric film, approach atomic-scale dimension.
Concomitantly, it is becoming economically unfavorable to make semiconductors smaller since nanomanufacturing is significantly more expensive. While advanced semiconductor nodes no longer bring the desired cost benefit, R&D investments in new lithography solutions and devices in sub-10nm nodes are rising substantially.
Transitioning into a Post-Moore World
Despite such bottlenecks, the emerging “More Than Moore” trend will drive innovation and spur the semiconductor industry onto an exciting phase ahead as we navigate a post-Moore world.
As chips become smaller and competition grows keener, semiconductor companies need a novel strategy for semiconductor design and manufacturing to fulfill new market demands. Increasingly, they are searching for technological solutions to bridge the gap and enhance cost-efficiency while at the same time imparting more functionality through better integration.
There are various techniques the industry can leverage.
Beyond Silicon - Compound Semiconductors
With silicon chips reigning the global electronics industry for decades, the tide may soon change as the multifold potentials of compound semiconductors are being unlocked to drive the next wave of technological advances, from 5G to quantum computing, more efficient renewable energy, and autonomous vehicles.
Compound semiconductors, made from combinations of group III and V elements of periodic table, are already widely used in high-speed and high-power analog electronics as well as optoelectronic applications. Notably, these materials are also considered the most promising successor to silicon in the “beyond CMOS” applications allowing the expansion of digital technologies beyond the scaling limits dictated by Moore’s Law.
Although compound semiconductors are more complex to manufacture than silicon, they possess unique material properties that allow them to outshine the latter, such as direct energy bandgap, high breakdown electric fields, and high electron mobility, enabling photonic, high-speed, and high-power device technologies.
The common target in the development of materials beyond silicon technologies, such as III-V compounds, is to improve the structural quality of the semiconductor crystal and material interface. For reliable and high-quality transistor device operation, the gate insulator-semiconductor interface must be very stable and free of interfacial imperfections and defects.
For the silicon industry, this problem is solved because the gate insulator typically forms a miraculously good interface with silicon which has been the key property allowing the aggressive device scaling according to Moore’s Law.
For III-V compound semiconductors, the situation is however far from optimal as the III-V materials are known to aggressively oxidize in a poor manner and the compound semiconductor-insulator interfaces are characterized by a high density of defects, hampering the transistor performance and making the adaptation of III-V materials for digital electronic applications difficult.
Fortunately, there are a number of emerging technologies that can meet the manufacturing challenges posed by compound semiconductors and open the door to their wider adoption in the industry.
Towards new performance levels for III-V opto-electronics
Working precisely in the space of III-V compound semiconductors, Comptek Solutions has developed a disruptive technology promising to tackle the thorny oxidation problem of compound semiconductor devices.
In our laboratories equipped with cleanroom facilities, custom ultra-high-vacuum reactors and cutting-edge equipment for characterization and other processes, the team have accumulated years of expertise in handling and producing high quality III-V-based structures that center on the company's breakthrough nanoengineering technology - Kontrox.
Comptek's Kontrox passivation technology is compatible with the majority of III-V compound materials such as GaAs, InP, InAs, InSb and GaN. With the funding support from the European Innovation Council, the team have succeeded in building and innovating pilot lines to apply its central technology, Kontrox, to wafer substrates of different sizes for different applications.
In essence, our novel passivation technology, Kontrox, is a highly-controlled oxidation process that reconstructs the semiconductor surfaces atom by atom into near-perfect crystalline native oxide structures that are stable and present up to 98% reduction in defect state densities. The resultant self-limiting Kontrox layers have low surface energy, and act as an effective natural diffusion barrier for further oxidation of III-V material.
The improved interfaces are verified, for example, by drastic enhancement in the photoluminescence intensity and internal quantum efficiency in optoelectronic and photonic devices, indicating reduced defect-related, non-radiative recombination.
When used in combination with the common thin-film deposition method of ALD, Kontrox also represents a powerful technique for drastically improved quality of the interface between the ALD and III-V material – a most crucial part, for example, in digital electronic CMOS transistor structure.
As evidenced in HR-TEM pictures, Kontrox creates atomic-level sharp crystalline interface between III-V material and gate-insulator and the benefits are measured, for instance, by the drastic improvements of capacitance-voltage and gate leakage characteristic in metal insulator-semiconductor stacks. The substantive improvement of the chip quality also means the number of defective parts is minimized while the manufacturing yields are increased, enabling crucial cost reductions for manufacturers.
Kontrox passivation technology can bring a revolutionary change in transistor structures as it creates an almost defect-free interface between the channel and the gate insulators, paving the way for the beyond-CMOS technologies.
While the semiconductor market has enjoyed decades of unprecedented growth thanks to the virtuous cycle of Moore’s Law, the industry is in an evident need of new functional diversification of technologies. More-than-Moore devices fusing performance, integration and cost not confined to CMOS scaling demonstrate this rising trend and their significance will become more and more conspicuous.
At Comptek, we share the industry's zeal for continuous technological advances and are eager to fuel the development of next-generation devices with our transformative passivation technologies and nanoengineering expertise. To learn more about what our technologies can bring to your applications, welcome to reach out to the Comptek team.
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Compound Semiconductor Market to Reach $347.0 Billion, Globally, by 2031 at 11.6% CAGR: Allied
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